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1 lt1579 300ma dual input smart battery backup regulator daisy-chained control outputs features the lt ? 1579 is a dual input, single output, low dropout regulator. this device is designed to provide an uninterruptible output voltage from two independent input voltage sources on a priority basis. all of the circuitry needed to switch smoothly and automatically between inputs is incorporated. the lt1579 can supply 300ma of output current from either input at a dropout voltage of 0.4v. quiescent current is 50 m a, dropping to 7 m a in shutdown. two comparators are included to monitor input voltage status. two addi- tional status flags indicate which input is supplying power and provide an early warning against loss of output regulation when both inputs are low. a secondary select pin is provided so that the user can force the device to switch from the primary input to the secondary input. internal protection circuitry includes reverse-battery pro- tection, current limiting, thermal limiting and reverse- current protection. the device is available in fixed output voltages of 3v, 3.3v and 5v, and as an adjustable device with a 1.5v reference voltage. the lt1579 regulators are available in narrow 16-lead so and 16-lead ssop packages with all features, and in so-8 with limited features. descriptio n u n maintains output regulation with dual inputs n dropout voltage: 0.4v n output current: 300ma n 50 m a quiescent current n no protection diodes needed n two low-battery comparators n status flags aid power management n adjustable output from 1.5v to 20v n fixed output voltages: 3v, 3.3v and 5v n 7 m a quiescent current in shutdown n reverse-battery protection n reverse current protection n remove, recharge and replace batteries without loss of regulation 5v dual battery supply automatic input switching 2.7m 1m 2.7m 1m + 1 f + 1 f + 4.7 f 5v 300ma to power management 0.01 f in1 out ss shdn lbo1 lb02 backup dropout biascomp lbi1 in2 lbi2 gnd lt1579-5 1579 ta01 time (ms) 0 input voltage (v) output voltage (v) 4 8 12 16 1578 ta02 0 5.00 2 6 input current (ma) 40 80 0 20 60 10 5.05 4.95 4 8 12 218 6 10 14 20 v in2 = 10v i load = 50ma switchover point v in1 i in1 i in2 applicatio n s u n dual battery systems n battery backup systems n automatic power management for battery-operated systems typical applicatio n u , ltc and lt are registered trademarks of linear technology corporation.
2 lt1579 t jmax = 125 c, q ja = 90 c/w absolute m axi m u m ratings w ww u power input pin voltage ...................................... 20v* output pin voltage fixed devices............................................. 6.5v, C 6v adjustable device ............................................ 20v* output pin reverse current .................................... 5ma adj pin voltage .............................................. 2v, C 0.6v adj pin current ...................................................... 5ma control input pin voltage ............................ 6.5v, C 0.6v control input pin current ....................................... 5ma wu u package / o rder i for atio biascomp pin voltage ............................... 6.5v, C 0.6v biascomp pin current .......................................... 5ma logic flag output voltage ............................ 6.5v, C 0.6v logic flag input current ......................................... 5ma output short-circuit duration .......................... indefinite storage temperature range ................. C 65 c to 150 c operating junction temperature range .... 0 c to 125 c lead temperature (soldering, 10 sec).................. 300 c *for applications requiring input voltage ratings greater than 20v, consult factory. order part number order part number consult factory for industrial and military grade parts. see application information section t jmax = 125 c, q ja = 90 c/w see application information section lt1579cs8 s8 part marking 15793 157933 15795 lt1579cs8-3 lt1579cs8-3.3 lt1579cs8-5 order part number s8 part marking 1579 order part number see application information section top view 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd v in1 v in2 ss shdn lbi1 lbi2 gnd gnd out backup dropout lbo1 lbo2 biascomp gnd power inputs control inputs logic outputs gn package 16-lead plastic ssop s package 16-lead plastic so t jmax = 125 c, q ja = 95 c/w (gn) t jmax = 125 c, q ja = 68 c/w (s) t jmax = 125 c, q ja = 95 c/w (gn) t jmax = 125 c, q ja = 68 c/w (s) see application information section top view gn package 16-lead plastic ssop s package 16-lead plastic so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd v in1 v in2 ss shdn lbi1 lbi2 gnd gnd out adj backup lbo1 lbo2 biascomp gnd power inputs control inputs logic outputs 1 2 3 4 8 7 6 5 top view out backup dropout biascomp v in1 v in2 shdn gnd s8 package 8-lead plastic so power inputs control input logic outputs 1 2 3 4 8 7 6 5 top view out adj backup biascomp v in1 v in2 shdn gnd s8 package 8-lead plastic so power inputs control input logic output lt1579cgn-3 lt1579cgn-3.3 LT1579CGN-5 lt1579cs-3 lt1579cs-3.3 lt1579cs-5 lt1579cgn lt1579cs gn part marking 15793 157933 15795 gn part marking 1579
3 lt1579 electrical characteristics parameter conditions min typ max units regulated output lt1579-3 v in1 = v in2 = 3.5v, i load = 1ma, t j = 25 c 2.950 3.000 3.050 v voltage (note 1) 4v < v in1 < 20v, 4v < v in2 < 20v, 1ma < i load < 300ma l 2.900 3.000 3.100 v lt1579-3.3 v in1 = v in2 = 3.8v, i load = 1ma, t j = 25 c 3.250 3.300 3.350 v 4.3v < v in1 < 20v, 4.3v < v in2 < 20v, 1ma < i load < 300ma l 3.200 3.300 3.400 v lt1579-5 v in1 = v in2 = 5.5v, i load = 1ma, t j = 25 c 4.925 5.000 5.075 v 6v < v in1 < 20v, 6v < v in2 < 20v, 1ma < i load < 300ma l 4.850 5.000 5.150 v adjust pin voltage lt1579 v in1 = v in2 = 3.2v, i load = 1ma, t j = 25 c (note 2) 1.475 1.500 1.525 v 3.7v < v in1 < 20v, 3.7v < v in2 < 20v, 1ma < i load < 300ma l 1.450 1.500 1.550 v line regulation lt1579-3 d v in1 = 3.5v to 20v, d v in2 = 3.5v to 20v, i load = 1ma l 1.5 10 mv lt1579-3.3 d v in1 = 3.8v to 20v, d v in2 = 3.8v to 20v, i load = 1ma l 1.5 10 mv lt1579-5 d v in1 = 5.5v to 20v, d v in2 = 5.5v to 20v, i load = 1ma l 1.5 10 mv lt1579 d v in1 = 3.2v to 20v, d v in2 = 3.2v to 20v, i load = 1ma (note 2) l 1.5 10 mv load regulation lt1579-3 v in1 = v in2 = 4v, d i load = 1ma to 300ma, t j = 25 c 3 12 mv v in1 = v in2 = 4v, d i load = 1ma to 300ma l 25 mv lt1579-3.3 v in1 = v in2 = 4.3v, d i load = 1ma to 300ma, t j = 25 c 3 12 mv v in1 = v in2 = 4.3v, d i load = 1ma to 300ma l 25 mv lt1579-5 v in1 = v in2 = 6v, d i load = 1ma to 300ma, t j = 25 c 5 15 mv v in1 = v in2 = 6v, d i load = 1ma to 300ma l 35 mv lt1579 v in1 = v in2 = 3.7v, d i load = 1ma to 300ma, t j = 25 c (note 2) 2 10 mv v in1 = v in2 = 3.7v, d i load = 1ma to 300ma l 20 mv dropout voltage i load = 10ma, t j = 25 c 0.10 0.28 v (notes 3, 4) i load = 10ma l 0.39 v v in1 = v in2 = i load = 50ma, t j = 25 c 0.18 0.35 v v out(nominal) i load = 50ma l 0.45 v i load = 150ma, t j = 25 c 0.25 0.47 v i load = 150ma l 0.60 v i load = 300ma, t j = 25 c 0.34 0.60 v i load = 300ma l 0.75 v ground pin current i load = 0ma, t j = 25 c 50 100 m a (note 5) i load = 0ma l 400 m a v in1 = v in2 = i load = 1ma, t j = 25 c 100 200 m a v out(nominal) + 1v i load = 1ma l 500 m a i load = 50ma l 0.7 1.5 ma i load = 150ma l 24 ma i load = 300ma l 5.8 12 ma standby current i vin2 : v in1 = 20v, v in2 = v out(nominal) + 0.5v, v ss = open (hi) l 3.3 7.0 m a (note 6) i load = 0ma i vin1 : v in1 = v out(nominal) + 0.5v, v in2 = 20v, v ss = 0v l 2.0 7.0 m a shutdown threshold v out = off to on l 0.9 2.8 v v out = on to off l 0.25 0.75 v shutdown pin current v shdn = 0v l 1.3 5 m a (note 7) quiescent current in i vin1 : v in1 = 20v, v in2 = 6v, v shdn = 0v l 512 m a shutdown (note 9) i vin2 : v in1 = 6v, v in2 = 20v, v shdn = 0v l 512 m a i src : v in1 = v in2 = 20v, v shdn = 0v 3 m a
4 lt1579 electrical characteristics parameter conditions min typ max units adjust pin bias current t j = 25 c 630 na (notes 2, 7) minimum input voltage i load = 0ma l 2.7 3.2 v (note 8) minimum load current lt1579 v in1 = v in2 = 3.2v l 3 m a secondary select switch from v in2 to v in1 l 1.2 2.8 v threshold switch from v in1 to v in2 l 0.25 0.75 v secondary select pin v ss = 0v l 1 1.5 m a current (note 7) low-battery trip threshold v in1 = v in2 = v out(nominal) + 1v, high-to-low transition l 1.440 1.500 1.550 v low-battery comparator v in1 = v in2 = 6v, i lbo = 20 m a (note 11) l 18 30 mv hysteresis low-battery comparator v in1 = v in2 = 6v, v lbi = 1.4v, t j = 25 c25na bias current (notes 7, 10) logic flag output voltage i sink = 20 m a l 0.17 0.45 v i sink = 5ma l 0.97 1.3 v ripple rejection v in1 C v out = v in2 C v out = 1.2v (avg), v ripple = 0.5v p-p 55 70 db f ripple = 120hz, i load = 150ma current limit v in1 = v in2 = v out(nominal) + 1v, d v out = C 0.1v l 320 400 ma input reverse leakage v in1 = v in2 = C20v, v out = 0v l 1.0 ma current reverse output current lt1579-3 v out = 3v, v in1 = v in2 = 0v 3 12 m a lt1579-3.3 v out = 3.3v, v in1 = v in2 = 0v 3 12 m a lt1579-5 v out = 5v, v in1 = v in2 = 0v 3 12 m a the l denotes specifications which apply over the full operating temperature range. note 1: operating conditions are limited by maximum junction temperature. the regulated output voltage specification will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, output current must be limited. when operating at maximum output current, the input voltage range must be limited. note 2: the lt1579 (adjustable version) is tested and specified with the adjust pin connected to the output pin and a 3 m a dc load. note 3: dropout voltage is the minimum input-to-output voltage differential required to maintain regulation at the specified output current. in dropout, the output voltage will be equal to v in C v dropout . note 4: to meet the requirements for minimum input voltage, the lt1579 (adjustable version) is connected with an external resistor divider for a 3.3v output voltage (see curve of minimum input voltage vs temperature in the typical performance characteristics). for this configuration, v out(nominal) = 3.3v. note 5: ground pin current will rise at t j > 75 c. this is due to internal circuitry designed to compensate for leakage currents in the output transistor at high temperatures. this allows quiescent current to be minimized at lower temperatures, yet maintain output regulation at high temperatures with light loads. see the curve of quiescent current vs temperature in the typical performance characteristics. note 6: standby current is the minimum quiescent current for a given input while the other input supplies the load and bias currents. note 7: current flow is out of the pin. note 8: minimum input voltage is the voltage required on either input to maintain the 1.5v reference for the error amplifier and low-battery comparators. note 9: total quiescent current in shutdown will be approximately equal to i vin1 + i vin2 C i src . both i vin1 and i vin2 are specified for worst-case conditions. i vin1 is specified under the condition that v in1 > v in2 and i vin2 is specified under the condition that v in2 > v in1 . i src is drawn from the highest input voltage only. for normal operating conditions, the quiescent current of the input with the lowest input voltage will be equal to the specified quiescent current minus i src . for example, if v in1 = 20v, v in2 = 6v then i vin1 = 5 m a and i vin2 = 5 m a C 3 m a = 2 m a. note 10: the specification applies to both inputs independently (lbi1, lbi2). note 11: low-battery comparator hysteresis will change as a function of current in the low-battery comparator output. see the curve of low-battery comparator hysteresis vs sink current in the typical performance characteristics.
5 lt1579 typical perfor m a n ce characteristics u w temperature ( c) ?0 output voltage (v) 3.06 25 1579 g03 3.00 2.96 ?5 0 50 2.94 2.92 3.08 3.04 3.02 2.98 75 100 125 i load = 1ma guaranteed dropout voltage output current (ma) 0 0 dropout voltage (v) 0.1 0.2 0.3 0.4 0.6 0.7 0.8 50 100 150 200 1579 g35 250 300 0.5 = test points t j 125 c t j = 25 c temperature ( c) ?0 4 5 7 25 75 1579 g36 3 2 ?5 0 50 100 125 1 0 6 quiescent current ( m a) v in1 = 20v v in2 = 6v v shdn = 0v i vin1 i vin2 quiescent current in shutdown input current v in1 ?v out (v) 0 input current ( m a) 20 40 60 10 30 50 0 0.2 0.4 0.6 1579 g07 0.8 0.1 0.2 0.1 0.3 0.5 0.7 i in2 i in1 v out = 5v v in2 = 6v i load = 0 temperature ( c) ?0 adjust pin voltage (v) 1.53 25 1579 g05 1.50 1.48 ?5 0 50 1.47 1.46 1.54 1.52 1.51 1.49 75 100 125 i load = 1ma adjust pin voltage lt1579-5 output voltage temperature ( c) ?0 output voltage (v) 5.09 25 1579 g05 5.00 4.94 ?5 0 50 4.91 4.88 5.12 5.06 5.03 4.97 75 100 125 i load = 1ma lt1579-3 output voltage lt1579-3.3 output voltage temperature ( c) ?0 output voltage (v) 3.36 25 1579 g04 3.30 2.26 ?5 0 50 2.24 2.22 3.38 3.34 3.32 2.28 75 100 125 i load = 1ma quiescent current temperature ( c) ?0 0 quiescent current ( m a) 10 30 40 50 100 0 50 75 1579 g02 20 80 90 60 70 ?5 25 100 125 v in = 6v r l = (fixed) r l = 500k (adjustable) operating quiescent current standby quiescent current temperature ( c) ?0 0.4 0.5 0.7 25 75 1579 g01 0.3 0.2 ?5 0 50 100 125 0.1 0 0.6 dropout voltage (v) a: i load = 300ma b: i load = 150ma c: i load = 100ma d: i load = 50ma e: i load = 10ma f: i load = 1ma a b c d e f dropout voltage
6 lt1579 typical perfor m a n ce characteristics u w input and ground pin current v in1 ?v out (v) 0 input current (ma) ground pin current ( m a) 4 8 12 2 6 10 0 200 400 600 100 300 500 0 0.2 0.4 0.6 1579 g09 0.8 0.1 0.2 0.1 0.3 0.5 0.7 i in2 i in1 v out = 5v v in2 = 6v i load = 10ma i gnd input and ground pin current input and ground pin current input and ground pin current v in1 ?v out (v) 0 input current (ma) ground pin current ( m a) 0.4 0.8 1.2 0.2 0.6 1.0 0 100 200 300 50 150 250 0 0.2 0.4 0.6 1579 g08 0.8 0.1 0.2 0.1 0.3 0.5 0.7 i in2 i in1 v out = 5v v in2 = 6v i load = 1ma i gnd v in1 ?v out (v) 0 input current (ma) ground pin current (ma) 20 40 60 10 30 50 0 0.4 0.8 1.2 0.2 0.6 1.0 0 0.2 0.4 0.6 1579 g10 0.8 0.1 0.2 0.1 0.3 0.5 0.7 i in2 i in1 v out = 5v v in2 = 6v i load = 50ma i gnd v in1 ?v out (v) 0 input current (ma) ground pin current (ma) 40 80 120 20 60 100 0 1.0 2.0 3.0 0.5 1.5 2.5 0 0.2 0.4 0.6 1579 g11 0.8 0.1 0.2 0.1 0.3 0.5 0.7 i in2 i in1 v out = 5v v in2 = 6v i load = 100ma i gnd input and ground pin current input and ground pin current v in1 ?v out (v) 0 input current (ma) ground pin current (ma) 40 80 60 120 160 20 100 140 0 1.0 2.0 4.0 3.5 0.5 1.5 3.0 2.5 0 0.2 0.4 0.6 1579 g12 0.8 0.1 0.2 0.1 0.3 0.5 0.7 v out = 5v v in2 = 6v i load = 150ma i gnd i in2 i in1 v in1 ?v out (v) 0 input current (ma) ground pin current (ma) 100 200 150 300 350 50 250 0 4 8 14 2 6 12 10 0 0.2 0.4 0.6 1579 g13 0.8 0.1 0.2 0.1 0.3 0.5 0.7 v out = 5v v in2 = 6v i load = 300ma i gnd i in2 i in1
7 lt1579 typical perfor m a n ce characteristics u w logic flag output voltage (output low) logic flag output voltage (output low) temperature ( c) ?0 logic flag output voltage (v) 0.8 1.0 1.2 25 75 1579 g21 0.6 0.4 ?5 0 50 100 125 0.2 0 i sink = 5ma i sink = 20 m a logic flag sink current 0.2 logic flag output voltage (v) 0.4 0.6 0.5 0.8 1.0 0.1 0.3 0.7 0.9 1 m a10 m a 100 m a 1ma 10ma 1579 g20 0 output current (ma) 0 ground pin current (ma) 3 4 5 150 250 1579 g37 2 1 0 50 100 200 6 7 8 300 v in1 = v in2 = v out(nominal) + 1v ground pin current minimum input voltage temperature ( c) ?0 2.0 minimum input voltage (v) 2.1 2.3 2.4 2.5 3.0 2.7 0 50 75 1579 g14 2.2 2.8 2.9 2.6 ?5 25 100 125 shutdown pin threshold temperature ( c) ?0 25 0 shutdown pin threshold (v) 0.4 1.0 0 50 75 1579 g15 0.2 0.8 0.6 25 100 125 i load = 1ma secondary select threshold (switch to v in1 ) temperature ( c) ?0 0 secondary select pin threshold (v) 0.2 0.6 0.8 1.0 2.0 1.4 0 50 75 1579 g18 0.4 1.6 1.8 1.2 ?5 25 100 125 i load = 300ma i load = 1ma secondary select threshold (switch to v in2 ) temperature ( c) ?0 0 secondary select pin threshold (v) 0.2 0.6 0.8 1.0 2.0 1.4 0 50 75 1579 g17 0.4 1.6 1.8 1.2 ?5 25 100 125 i load = 1ma temperature ( c) ?0 25 0 shutdown pin current ( m a) 1.0 2.5 0 50 75 1579 g16 0.5 2.0 1.5 25 100 125 v shdn = 0v shutdown pin current secondary select pin current temperature ( c) ?0 0 secondary select pin current ( m a) 0.1 0.3 0.4 0.5 1.0 0.7 0 50 75 1579 g19 0.2 0.8 0.9 0.6 ?5 25 100 125 v ss = 0v
8 lt1579 typical perfor m a n ce characteristics u w logic flag input current (output high) current limit current limit input voltage (v) 0 current limit (a) 0.4 0.5 0.6 35 1579 g29 0.3 0.2 12 467 0.1 0 v out = 0v adjust pin voltage (v) 0 adjust pin input current (ma) 0.6 0.8 1.0 1.6 1579 g28 0.4 0.2 0.5 0.7 0.9 0.3 0.1 0 0.4 0.8 1.2 0.2 1.8 0.6 1.0 1.4 2.0 t j = 25 c v in1 = v in2 = 0v adjust pin input current low-battery comparator hysteresis temperature ( c) ?0 25 0 comparator hysteresis (mv) 10 25 0 50 75 1579 g25 5 20 15 25 100 125 i lbo(sink) = 50 m a logic flag voltage (v) 0 0 logic flag input current (ma) 5 15 20 25 2 4 59 1579 g22 10 13 6 7 8 control pin voltage (v) 0 0 control pin input current (ma) 5 15 20 25 2 4 59 1579 g23 10 13 6 7 8 control pin input current low-battery comparator hysteresis i lbo sink current ( m a) 0 comparator hysteresis (mv) 10 15 40 1579 g24 5 0 10 20 30 50 20 reverse output current temperature ( c) ?0 0 reverse output current ( m a) 2 6 8 10 20 14 0 50 75 1579 g27 4 16 18 12 ?5 25 100 125 v in1 = v in2 = 0v v out = 3v (lt1579-3) v out = 3.3v (lt1579-3.3) v out = 5v (lt1579-5) reverse output current output voltage (v) 0 0 reverse output current ( m a) 5 15 20 25 2 4 59 1579 g26 10 13 6 7 8 t j = 25 c v in1 = v in2 = 0v current flows into output pin lt1579-3.3 lt1579-3 lt1579-5 temperature ( c) ?0 0.4 0.5 0.7 25 75 1579 g38 0.3 0.2 ?5 0 50 100 125 0.1 0 0.6 current limit (a) v in1 = v in2 = v out(nominal) + 1v d v out = 0.1v typical guaranteed
9 lt1579 typical perfor m a n ce characteristics u w frequency (hz) 10 40 ripple rejection (db) 50 60 70 80 100 1k 10k 100k 1m 1579 g30 30 20 10 0 90 100 c out = 47 m f solid tantalum c out = 4.7 m f solid tantalum i load = 150ma v in = 6v + 50mv rms ripple ripple rejection pi n fu n ctio n s uuu v in1 : the primary power source is connected to v in1 . a bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1 m f to 10 m f is sufficient. v in2 : the secondary power source is connected to v in2 . a bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1 m f to 10 m f is sufficient. out: the output supplies power to the load. a minimum output capacitor of 4.7 m f is required to prevent oscilla- tions. larger output capacitors will be required for appli- cations with large transient loads to limit peak voltage transients. adj: for the adjustable lt1579, this is the input to the error amplifier. this pin is internally clamped to 7v and C 0.6v (one v be ). it has a bias current of 6na which flows 6v 5v v in1 v out 50mv/div unplug v in1 replace v in1 lt1579-5 hot plugging and unplugging transient response time (ms) 0 output voltage deviation (mv) load current (ma) ?0 50 0.8 1579 g34 200 ?00 0 100 300 100 0.2 0.4 0.6 0.1 0.9 0.3 0.5 0.7 1,0 v in = 6v c in = 1 m f ceramic c out = 22 m f tantalum lt1579-5 transient response lt1579-5 transient response time ( m s) 0 output voltage deviation (mv) load current (ma) ?0 50 400 1579 g33 100 50 ?00 0 100 75 25 0 100 200 300 50 450 150 250 350 500 v in = 6v c in = 1 m f ceramic c out = 4.7 m f tantalum load regulation temperature ( c) ?0 load regulation (mv) ? 25 1579 g40 ? ?2 ?5 0 50 ?4 ?6 0 ? ? ?0 75 100 125 d i load = 1ma to 300ma lt1579 lt1579-5 lt1579-3.3 lt1579-3
10 lt1579 pi n fu n ctio n s uuu nally clamped to 7v and C 0.6v (one v be ). if unused, this pin can be left open circuit. device operation is unaffected if this pin is not connected. dropout: the dropout flag is an open collector output which pulls low when both input voltages drop suffi- ciently for the lt1579 to enter the dropout region. this signals that the output is beginning to go unregulated. the dropout output voltage is 1v when sinking 5ma, dropping to under 200mv at 20 m a (see curve of logic flag voltage vs current in the typical performance char- acteristics). this makes the dropout pin equally useful in driving both bipolar and cmos logic inputs with the addition of an external pull-up resistor. it is also capable of driving higher current devices, such as leds. this pin is internally clamped to 7v and C 0.6v (one v be ). if unused, this pin can be left open circuit. device operation is unaffected if this pin is not connected. biascomp: this is a compensation point for the internal bias circuitry. it must be bypassed with a 0.01 m f capaci- tor for stability during the switch from v in1 to v in2 . lbi1: this is the noninvering input to low-battery com- parator lb1 which is used to detect a low input/battery condition. the inverting input is connected to a 1.5v reference. the low-battery comparator input has 18mv of hysteresis with more than 20 m a of sink current on the output (see applications information section). this pin is internally clamped to 7v and C 0.6 (one v be ). if not used, this pin can be left open circuit, with no effect on normal circuit operation. if unconnected, the pin will float to 1.5v and the logic output of lb1 will be high impedance. lbi2: this is the noninverting input to low-battery com- parator lb2 which is used to detect a low input/battery condition. the inverting input is connected to a 1.5v reference. the low-battery comparator input has 18mv of hysteresis with more than 20 m a of sink current on the output (see applications information section). this pin is internally clamped to 7v and C 0.6v (one v be ). if not used, this pin can be left open circuit, with no effect on normal circuit operation. if unconnected, the pin will float to 1.5v and the logic output of lb2 will be high impedance. out of the pin (see curve of adjust pin bias current vs temperature in the typical performance characteristics). a dc load of 3 m a is needed on the output of the adjustable part to maintain regulation. the adjust pin voltage is 1.5v referenced to ground and the output voltage range is 1.5v to 20v. shdn: the shutdown pin is used to put the lt1579 into a low power shutdown state. all functions are disabled if the shutdown pin is pulled low. the output will be off, all logic outputs will be high impedance and the voltage comparators will be off when the shutdown pin is pulled low. the shutdown pin is internally clamped to 7v and C 0.6v (one v be ), allowing the shutdown pin to be driven either by 5v logic or open collector logic with a pull-up resistor. the pull-up resistor is only required to supply the pull-up current of the open collector gate, normally several microamperes. if unused, the shutdown pin can be left open circuit. the device is active if the shutdown pin is not connected. ss: the secondary select pin forces the lt1579 to switch power draw to the secondary input (v in2 ). this pin is active low. the current drawn out of v in1 is reduced to 3 m a when this pin is pulled low. the secondary select pin is internally clamped to 7v and C 0.6v (one v be ), allowing the pin to be driven directly by either 5v logic or open collector logic with a pull-up resistor. the pull-up resistor is required only to supply the leakage current of the open collector gate, normally several microamperes. if sec- ondary select is not used, it can be left open circuit. the lt1579 draws power from the primary first if the second- ary select pin is not connected. backup: the backup flag is an open collector output which pulls low when the lt1579 starts drawing power from the secondary input (v in2 ). the backup output voltage is 1v when sinking 5ma, dropping to under 200mv at 20 m a (see curve of logic flag voltage vs current in the typical performance characteristics). this makes the backup pin equally useful in driving both bipolar and cmos logic inputs with the addition of an external pull-up resistor. it is also capable of driving higher current devices, such as leds. this pin is inter-
11 lt1579 pi n fu n ctio n s uuu lbo1: this is the open collector output of the low-battery comparator lb1. this output pulls low when the com- parator input drops below the threshold voltage. the lbo1 output voltage is 1v when sinking 5ma, dropping to under 200mv at 20 m a (see curve of logic flag voltage vs current in the typical performance characteristics). this makes the lbo1 pin equally useful in driving both bipolar and cmos logic inputs with the addition of an external pull-up resistor. it is also capable of driving higher current devices, such as leds. this pin is inter- nally clamped to 7v and C 0.6v (one v be ). if unused, this pin can be left open circuit. device operation is unaffected if this pin is not connected. lbo2: this is the open collector output of the low-battery comparator lb2. this output pulls low when the com- parator input drops below the threshold voltage. the lbo2 output voltage is 1v when sinking 5ma, dropping to under 200mv at 20 m a (see curve of logic flag voltage vs current in the typical performance characteristics). this makes the lbo2 pin equally useful in driving both bipolar and cmos logic inputs with the addition of an external pull-up resistor. it is also capable of driving higher current devices, such as leds. this pin is internally clamped to 7v and C 0.6v (one v be ). if unused, this pin can be left open circuit. device operation is unaffected if this pin is not connected. block diagra m w + + lb1 + lb2 1.5v reference bias current control dropout detect v in1 v in2 shdn ss biascomp lbi1 lbi2 v out adj backup dropout lbo1 lbo2 output driver control warning flags 1579 ?bd e/a internal resistor divider for fixed voltage devices only
12 lt1579 applicatio n s i n for m atio n wu u u device overview the lt1579 is a dual input, single output, low dropout linear regulator. the device is designed to provide an uninterruptible output voltage from two independent input voltage sources on a priority basis. all of the circuitry needed to switch smoothly and automatically between inputs is incorporated in the device. all power supplied to the load is drawn from the primary input (v in1 ) until the device senses that the primary input is failing. at this point the lt1579 smoothly switches from the primary input to the secondary input (v in2 ) to maintain output regulation. the device is capable of providing 300ma from either input at a dropout voltage of 0.4v. total quiescent current when operating from the primary input is 50 m a, which is 45 m a from the primary input, 2 m a from the secondary and a minimum input current of 3 m a which will be drawn from the higher of the two input voltages. a single error amplifier controls both output stages so regulation remains tight regardless of which input is providing power. threshold levels for the error amplifier and low-battery detectors are set by the internal 1.5v reference. output voltage is set by an internal resistor divider for fixed voltage parts and an external divider for adjustable parts. internal bias circuitry powers the refer- ence, error amplifier, output driver controls, logic flags and low-battery comparators. the lt1579 aids power management with the use of two independent low-battery comparators and two status flags. the low-battery comparators can be used to monitor the input voltage levels. the backup flag signals when any power is being drawn from the secondary input and the dropout flag provides indication that both input volt- ages are critically low and the output is unregulated. additionally, the switch to the secondary input from the primary can be forced externally through the use of the secondary select pin (ss). this active low logic pin, when pulled below the threshold, will cause power draw to switch from the primary input to the secondary input. current flowing in the primary input is reduced to only a few microamperes, while all power draw (load current and bias currents) switches to the secondary. the lt1579 has a low power shutdown state which shuts off all bias currents and logic functions. in shutdown, quiescent currents are 2 m a from the primary input, 2 m a from the secondary input and an additional 3 m a which is drawn from the higher of the two input voltages. adjustable operation the adjustable version of the lt1579 has an output voltage range of 1.5v to 20v. the output voltage is set by the ratio of two external resistors as shown in figure 1. the device servos the output to maintain the voltage at the adjust pin at 1.5v. the current in r1 is then equal to 1.5v/ r1 and the current in r2 is the current in r1 minus the adjust pin bias current. the adjust pin bias current, 6na at 25 c, flows out of the adjust pin through r1 to ground. the output voltage can now be calculated using the formula: vv r r ir out adj =+ ? ? ? ? ()() 15 1 2 1 2 . the value of r1 should be less than 500k to minimize the error in the output voltage caused by adjust pin bias current. with 500k resistors for both r1 and r2, the error induced by adjust pin bias current at 25 c is 3mv or 0.1% of the total output voltage. with appropriate value and tolerance resistors, the error due to adjust pin bias current may often be ignored. note that in shutdown, the output is turned off and the divider current is zero. the parallel combination of r1 and r2 should be greater than 20k to allow the error amplifier to start. in applications where the minimum parallel resistance requirement cannot be met, a 20k resistor may be placed in series with the adjust pin. this introduces an error in the reference point for the resistor divider equal to (i adj )(20k). figure 1. adjustable operation out adj gnd r2 r1 c fb + c out v out 1579 ?f01
13 lt1579 a small capacitor placed in parallel with the top resistor (r2) of the output divider is necessary for stability and transient performance of the adjustable lt1579. the impedance of c fb at 10khz should be less than the value of r1. the adjustable lt1579 is tested and specified with the output pin tied to the adjust pin and a 3 m a load (unless otherwise noted) for an output voltage of 1.5v. specifica- tions for output voltages greater than 1.5v are propor- tional to the ratio of the desired output voltage to 1.5v; (v out /1.5v). for example, load regulation for an output current change of 1ma to 300ma is C 2mv typical at v out = 1.5v. at v out = 12v, load regulation is: 12 15 216 v v mv mv . ? ? ? ? () = output capacitance and transient response the lt1579 is designed to be stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. a minimum output capacitor of 4.7 m f with an esr of 3 w or less is recommended to prevent oscillations. smaller value ca- pacitors may be used, but capacitors which have a low esr (i.e. ceramics) may need a small series resistor added to bring the esr into the range suggested in table 1. the lt1579 is a micropower device and output transient response is a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved output transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt1579, will increase the effective output capacitor value. table 1. suggested esr range output capacitance suggested esr range 1.5 m f1 w to 3 w 2.2 m f 0.5 w to 3 w 3.3 m f 0.2 w to 3 w 3 4.7 m f0 w to 3 w applicatio n s i n for m atio n wu u u biascomp pin compensation the biascomp pin is a connection to a compensation point for the internal bias circuitry. it must be bypassed with a 0.01 m f capacitor for stability during the switch from v in1 to v in2 . hot plugging and unplugging of inputs the lt1579 is designed to maintain regulation even if one of the outputs is instantaneously removed. if the primary input is supplying load current, removal and insertion of the secondary input creates no noticeable transient at the output. in this case, the lt1579 continues to supply current from the primary; no switching is required. how- ever, when load current is being supplied from the primary input and it is removed, load current must be switched from the primary to the secondary input. in this case, the lt1579 sees the input capacitor as a rapidly discharging battery. if it discharges too quickly, the lt1579 does not have ample time to switch over without a large transient occurring at the output. the input capacitor must be large enough to supply load current during the transition from primary to secondary input. replacement of the primary creates a smaller transient on the output because both inputs are present during the transition. for a 100ma load, input and output capacitors of 10 m f will limit peak output deviations to less than 50mv. see the hot plugging and unplugging transient response in the typical perfor- mance characteristics. proportionally larger values for input and output capacitors are needed to limit peak deviations on the output when delivering larger load currents. standby mode standby mode is where one input draws a minimum quiescent current when the other input is delivering all bias and load currents . in this mode, the standby current is the quiescent current drawn from the standby input. the secondary input will be in standby mode, when the pri- mary input is delivering all load and bias currents. when the secondary input is in standby mode the current drawn from the secondary input will be 3 m a if v in1 > v in2 and 5 m a
14 lt1579 if v in2 >v in1 , so typically only 3 m a. the primary input will automatically go into standby mode as the primary input drops below the output voltage. the primary input can also be forced into standby mode by asserting the ss pin. in either case, the current drawn from the primary input is reduced to a maximum of 7 m a. shutdown the lt1579 has a low power shutdown state where all functions of the device are shut off. the device is put into shutdown mode when the shutdown pin is pulled below 0.7v. the quiescent current in shutdown has three com- ponents: 2 m a drawn from the primary, 2 m a drawn from the secondary and 3 m a which is drawn from the higher of the two inputs. protecting batteries using secondary select (ss) some batteries, such as lithium-ion cells, are sensitive to deep discharge conditions. discharging these batteries below a certain threshold severely shortens battery life. to prevent deep discharge of the primary cells, the lt1579 secondary select (ss) pin can be used to switch power draw from the primary input to the secondary. when this pin is pulled low, current out of the primary is reduced to 2 m a. a low-battery detector with the trip point set at the critical discharge point can signal the low battery condi- tion and force the switchover to the secondary as shown in figure 2. the second low-battery comparator can be used to set a latch to shutdown the lt1579 (see the typical applications). applicatio n s i n for m atio n wu u u low-battery comparators there are two independent low-battery comparators in the lt1579. this allows for individual monitoring of each input. the inverting inputs of both comparators are con- nected to an internal 1.5v reference. the low-battery comparator trip point is set by an external resistor divider as shown in figure 3. the current in r1 at the trip point is 1.5v/r1. the current in r2 is equal to the current in r1. the low-battery comparator input bias current, 2na flow- ing out of the pin, is negligible and may be ignored. the value of r1 should be less than 1.5m in order to minimize errors in the trip point. the value of r2 for a given trip point is calculated using the formulas in figure 3. the low-battery comparators have a small amount of hysteresis built-in. the amount of hysteresis is dependent upon the output sink current (i sink ) when the comparator is tripped low. at no load, comparator hysteresis is zero, increasing to a maximum of 18mv for sink currents above 20 m a. see the curve of low-battery comparator hyster- esis in the typical performance characteristics. if larger amounts of hysteresis are desired, r3 and d1 can be added. d1 can be any small diode, typically a 1n4148. calculating v lbo can be done using a load line on the curve of logic flag output voltage vs sink current in the typical performance characteristics. figure 2. connecting ss to low-battery detector output to prevent damage to batteries lbo ss gnd v cc r p 1579 f02 + r2 r1 1.5v r4 d1 r3 v trip v out lbi lbo i sink ltc1579 ?f02 r2 = (v trip ?1.5v) r1 1.5v () hysteresis = v hyst 1 + for i sink 3 20 a, v hyst = 18mv, for i sink < 20 a, see the typical performance characteristics r2 r1 () r3 = (1.5v + v hyst ?0.6v ?v lbo )(r2) v hyst(added) for added hysteresis figure 3. low-battery comparator operation
15 lt1579 applicatio n s i n for m atio n wu u u example: the low-battery detector must be tripped at a terminal voltage of 5.5v. there is a 100k pull-up resistor to 5v on the output of the comparator and 200mv of hysteresis is needed to prevent chatter. with a 1m resistor for r1, what other resistor values are needed? using the formulas in figure 3, r vvm v m 2 55 15 1 15 267 = () w () =w .. . . use a standard value of 2.7m w . with the 100k pull-up resistor, this gives a sink current and logic flag voltage of approximately 45 m a at 0.4v. the hysteresis in this case will be: hysteresis mv m m mv =+ w w ? ? ? ? = 18 1 27 1 67 . an additional 133mv of hysteresis is needed, so a resistor and diode must be added. the value of r3 will be: r vmv v vm mv m 3 15 18 06 04 27 133 10 5 = + () w () =w .... . a standard value of 10m w can be used. the additional current flowing through r3 into the comparator output is negligible and can usually be ignored logic flags the low-battery comparator outputs and the status flags of the lt1579 are open collector outputs capable of sinking up to 5ma. see the curve of logic flag output voltage vs. current in the typical performance character- istics. there are two status flags on the lt1579. the backup flag and the dropout flag provide information on which input is supplying power to the load and give early warning of loss of output regulation. the backup flag goes low when the secondary input begins supplying power to the load. the dropout flag signals the dropout condition on both inputs, warning of an impending drop in output voltage. the conditions that set either status flag are determined by input to output voltage differentials and current supplied to the load from each input. normal output deviation during transient load conditions (with sufficient input voltages) will not set the status flags. timing diagram the timing diagram for the 5v dual battery supply is shown in figure 4. the schematic is the same as the 5v dual battery supply on the front of the data sheet. all logic flag outputs have 100k pull-up resistors added. note that there is no time scale for the timing diagram. the timing diagram is meant as a tool to help in understanding basic operation of the lt1579. actual discharge rates will be a function of the load current and the type of batteries used. the load current used in the example was 100ma dc. figure 4. basic dual battery timing diagram ab c d e 6v 5v v in1 6v 5v 5v 0 0 0 1 0 1 0 1 0 1 100ma 4.8v 100ma v in2 i in1 i in2 v out backup dropout lb02 lb01 ltc1579 ?f03
16 lt1579 applicatio n s i n for m atio n wu u u five milestones are noted on the timing diagram. time a is where the primary input voltage drops enough to trip the low-battery detector lb1. the trip threshold for lb1 is set at set at 5.5v, slightly above the dropout voltage of the primary input. at time b, the backup flag goes low, signaling the beginning of the transition from the primary source to the secondary source. between times b and c, the input current makes a smooth transition from v in1 to v in2 . by time c, the primary battery has dropped below the point where it can deliver useful current to the output. the primary input will still deliver a small amount of current to the load, diminishing as the primary input voltage drops. by time d, the secondary battery has dropped to a low enough voltage to trip the second low-battery detector, lb2. the trip threshold for lb2 is also set at 5.5v, slightly above where the secondary input reaches dropout. at time e, both inputs are low enough to cause the lt1579 to enter dropout, with the dropout flag signaling the impending loss of output regulation. after time e, the output voltage drops out of regulation. some interesting things can be noted on the timing diagram. the amount of current available from a given input is determined by the input/output voltage differen- tial. as the differential voltage drops, the amount of current drawn from the input also drops, which slows the discharge of the battery. dropout detection circuitry will maintain the maximum current draw from the input for the given input/output voltage differential. in the case shown, this causes the current drawn from the primary input to approach zero, though never actually dropping to zero. note that the primary begins to supply significant current again when the output drops out of regulation. this occurs because the input/output voltage differential of the pri- mary input increases as the output voltage drops. the lt1579 will automatically maximize the power drawn from the inputs to maintain the highest possible output voltage. thermal considerations the power handling capability of the lt1579 is limited by the maximum rated junction temperature (125 c). power dissipated is made up of two components: 1. the output current from each input multiplied by the respective input to output voltage differential: (i out )(v in C v out ) and 2. ground pin current from the associated inputs multi- plied by the respective input voltage: (i gnd )(v in ). if the primary input is not in dropout, all significant power dissipation is from the primary input. conversely, if ss has been asserted to minimize power draw from the primary, all significant power dissipation will be from the second- ary. when the primary input enters dropout, calculation of power dissipation requires consideration of power dissi- pation from both inputs. worst-case power dissipation is found using the worst-case input voltage from either input and the worst-case load current. ground pin current is found by examining the ground pin current curves in the typical performance characteris- tics. power dissipation will be equal to the sum of the two components above for the input supplying power to the load. power dissipation from the other input is negligible. the lt1579 has internal thermal limiting designed to protect the device during overload conditions. for con- tinuous normal load conditions, the maximum junction temperature rating of 125 c must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambient. additional heat sources nearby must also be considered. heating sinking for the device is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through- holes can also be used to spread the heat. all ground pins on the lt1579 are fused to the die paddle for improved heat spreading capabilities. the following tables list thermal resistances for each pack- age. measured values of thermal resistance for several different board sizes and copper areas are listed for each package. all measurements were taken in still air on 3/32 fr-4 board with one ounce copper. all ground leads were connected to the ground plane. all packages for the lt1579 have all ground leads fused to the die attach paddle to lower thermal resistance. typical thermal
17 lt1579 applicatio n s i n for m atio n wu u u resistance from the junction to a ground lead is 40 c/w for 16-lead ssop, 32 c/w for 16-lead so and 35 c/w for 8-lead s0. table 2. 8-lead so package (s8) copper area thermal resistance topside* backside board area (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 73 c/w 1000 sq mm 2500 sq mm 2500 sq mm 75 c/w 225 sq mm 2500 sq mm 2500 sq mm 80 c/w 100 sq mm 2500 sq mm 2500 sq mm 90 c/w *device is mounted on topside. table 3. 16-lead so package (s) copper area thermal resistance topside* backside board area (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 55 c/w 1000 sq mm 2500 sq mm 2500 sq mm 58 c/w 225 sq mm 2500 sq mm 2500 sq mm 60 c/w 100 sq mm 2500 sq mm 2500 sq mm 68 c/w *device is mounted on topside. table 4. 16-lead ssop package (gn) copper area thermal resistance topside* backside board area (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 70 c/w 1000 sq mm 2500 sq mm 2500 sq mm 75 c/w 225 sq mm 2500 sq mm 2500 sq mm 80 c/w 100 sq mm 2500 sq mm 2500 sq mm 95 c/w *device is mounted on topside. calculating junction temperature example: given an output voltage of 5v, an input voltage range of 5v to 7v for v in1 and 8v to 10v for v in2 , with an output current range of 10ma to 150ma and a maximum ambient temperature of 50 c, what will the maximum junction temperature be? when run from the primary input, current drawn from the secondary input is negligible and worst-case power dissi- pation will be: (i out(max) )(v in1(max) C v out ) + (i gnd )(v in1(max) ) where: i out(max) = 150ma v in1(max) = 7v i gnd at (i out = 150ma, v in1 = 7v) = 2ma therefore, p = (150ma)(7v C 5v) + (2ma)(7v) = 0.31w when switched to the secondary input, current from the primary input is negligible and worst-case power dissipa- tion will be: (i out(max) )(v in2(max) C v out ) + (i gnd )(v in2(max) ) where: i out(max) = 150ma v in2(max) = 10v i gnd at (i out = 150ma, v in2 = 10v) = 2ma therefore, p = (150ma)(10v C 5v) + (2ma)(10v) = 0.77w using a 16-lead so package, the thermal resistance will be in the range of 55 c/w to 68 c/w dependent upon the copper area. so the junction temperature rise above ambient will be approximately equal to: (0.77w)(65 c/w) = 50.1 c the maximum junction temperature will then be equal to the maximum temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50.1 c + 50 c = 100.1 c protection features the lt1579 incorporates several protection features that make it ideal for use in battery-powered circuits. in addi- tion to the normal protection features associated with monolithic regulators, such as current limiting and ther- mal limiting, the device is protected against reverse input voltages, reverse output voltages and reverse voltages from output to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal opera- tion, the junction temperature should not exceed 125 c. current limit protection is designed to protect the device if the output is shorted to ground. with the output shorted to ground, current will be drawn from the primary input until it is discharged. the current drawn from v in2 will not increase until the primary input is discharged. this pre- vents a short-circuit on the output from discharging both inputs simultaneously.
18 lt1579 applicatio n s i n for m atio n wu u u the inputs of the device can withstand reverse voltages up to 20v. current flow into the device will be limited to less than 1ma (typically less than 100 m a) and no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries which can be plugged in backwards. internal protection circuitry isolates the inputs to prevent current flow from one input to the other. even with one input supplying all bias currents and the other being plugged in backwards (a maximum total differential of 40v), current flow from one input to another will be limited to less than 1ma. output voltage will be unaffected. in the case of reverse inputs, no reverse voltages will appear at the load. pulling the ss pin low will cause all load currents to come from the secondary input. if the secondary input is not present, the output will be turned off. if the part is put into current limit with the ss pin pulled low, current limit will be drawn from the secondary input until it is discharged, at which point the current limit will drop to zero. package descriptio n u dimensions in inches (millimeters) unless otherwise noted. gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) gn16 (ssop) 1197 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 12 3 4 5 6 7 8 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.189 ?0.196* (4.801 ?4.978) 12 11 10 9 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.025 (0.635) bsc
19 lt1579 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio n u s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** dimensions in inches (millimeters) unless otherwise noted.
20 lt1579 ? linear technology corporation 1998 1579f lt/tp 0398 4k ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com part number description comments lt1175 500ma negative low dropout micropower regulator adjustable current limit, shutdown control ltc ? 1421 hot swap tm controller controls multiple supplies, 24-lead ssop package ltc1422 hot swap controller controls single supply, 8-lead so package ltc1473 dual powerpath tm switch driver power path management for systems with multiple inputs ltc1479 powerpath controller for dual battery systems complete power path management for two batteries, dc power source, charger and backup lt1521 300ma low dropout micropower regulator with shutdown 12 m a i q , reverse battery protection hot swap and powerpath are trademarks of linear technology corporation. related parts typical applicatio n u additional logic forces lt1579 into shutdown to protect input batteries r2 2.7m r10 1m r1 1m r3 1m r6 2.7m r7 1m in1 lbi1 lbo1 ss in2 lbi2 r4 10m d1 r5 1m c1 1 f c3 4.7 f c5 0.1 f c2 1 f in1 d2 d1 to d3: 1n4148 1579 ta03 d3 in2 1/4 74c02 1/4 74c02 gnd v cc 1/4 74c02 r9 1.5m r8 330k d4 5.1v 1n751a shdn lbo2 gnd c4 0.01 f nc lt1579-5 biascomp dropout out backup main good v out 5v/300ma reset

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